Design of Analog-AI Hardware Accelerators for Transformer-based Language Models
Dec 1, 2023·,,,,,
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0 min read
G. W. Burr
H. Tsai
W. Simon
I. Boybat
S. Ambrogio
C.-E. Ho
Ze-Wei Liou
et al.
Abstract
Analog Non-Volatile Memory-based accelerators offer high-throughput and energy-efficient Multiply-Accumulate operations for the large Fully-Connected layers that dominate Transformer-based Large Language Models. We describe architectural, wafer-scale testing, chip-demo, and hardware-aware training efforts towards such accelerators, and quantify the unique raw-throughput and latency benefits of Fully- (rather than Partially-)Weight-Stationary systems.
Type
Publication
2023 International Electron Devices Meeting (IEDM)
Authors
PhD student @ Princeton
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I am a first-year PhD student at Princeton, advised by Prof. Tri Dao. My research focuses on ML Systems.
My official name is Ze-Wei Liou, but I also go by the name “Johnny.” I did my undergrad in EE at National Taiwan University. Feel free to reach out!